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Digital Core Design
VHDL, Verilog synthesizable and simulation models.
http://www.dcd.pl/
Sim-nML
A high-level processor specification language. it views a processor as a machine that executes a set of instructions. syntax, image, functionality (side-effect), resource-usage and timing of each instruction are described in a hierarchical form.
http://www.cse.iitk.ac.in/sim-nml/
Doulos KnowHow
Designer's guides and models for VHDL and Verilog. SystemC home. Also Perl and Tcl/Tk for hardware designers resources.
http://www.doulos.com/knowhow/
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