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LEON-1 VHDL model
Functional SPARC compatible processor core integer unit. Runs on Altera, Mietec, Temic MG2, Xilinx. Developed for space missions. Implemented as a highly configurable, synthesisable GPL VHDL model.
http://www.estec.esa.nl/wsmwww/leon/
E-Risc
Project to design and implement scaleable RISC microprocessor for embedded applications. All architecture and source code to be released under GNU General Public License, or a slightly modified version that includes hardware, not only software.
http://www.geocities.com/SiliconValley/Chip/5014/
picoJava Core
A core is the central component of a microprocessor or controller chip. Chips using picoJava core are ideally suited for consumer electronic products running Java applications. By Sun Microsytems, Sun Community Source License.
http://www.sun.com/microelectronics/picoJava/
CMOSexod.com
For advanced hobbyists: share free microprocessor and DSP IP cores written in Verilog or VHDL.
http://www.cmosexod.com/
The Freedom CPU
Mainly dedicated to purely SIMD superpipelined 64-bit RISC CPU, and the sources distributed under the terms of the GNU licence.
http://www.f-cpu.org/
MMIXware: A RISC Computer for the Third Millennium
Knuth's new MMIX book, full text online at Springer Verlag, Inc.
http://link.springer.de/link/service/series/0558/tocs/t1750.htm
MMIX: a RISC computer for the third millennium
Donald E. Knuth's new 64-bit processor for the new volumes of his landmark series: 'The Art of Computer Programming'. But might MMIX become more than only a book example.
http://www-cs-faculty.stanford.edu/~knuth/mmix.html
MMIX Page of Munich Professional School
Mixed German-English site at Munich University of Applied Sciences. MMIX extensions: MMIXAL LaTeX output, Win32 graphical output.
http://www.informatik.fh-muenchen.de/~mmix/
STM
32-bit, 2-way superscalar RISC processor, designed in a HDL. Source downloads. This one is actually working.
http://www.asahi-net.or.jp/~uf8e-itu/
TRON VLSI CPU
32-bit microprocessor architecture developed to serve as the main hardware building block of the real-time TRON Hypernetwork (Highly Functional Distributed System: HFDS), which is the ultimate goal of the TRON Project.
http://tronweb.super-nova.co.jp/tronvlsicpu.html
Press: Sun Extends Community Source Licensing to Chip Architectures
Sun Microsystems announces: for research uses, it extends its new Community Source Licensing model to picoJava and SPARC architectures; the first time a company made major microprocessor intellectual property available via open licensing.
http://www.sun.com/smi/Press/sunflash/9903/sunflash.990302.4.html
News: Deja.com: Free SPARC VHDL model available
Initial announcement of the GPLed LEON SPARC architecture.
http://www.deja.com/[LBURL=_LBHTdmoz.org_LBFSComputers_LBFSOpen_Source_LBFSHardware_LBFS,LBT,S0=9006fc1e17b4266]/threadmsg_ct.xp?AN=533888541
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